There is an information processing apparatus which is equipped with a plurality of chipsets indispensable for system operation as backup resources in order to improve the availability. Such the information apparatus switches an operation from an operational chipset to a backup chipset so as to prevent a system disable state when a failure occurs in the operational chipset and the system is down.
However, an operating chipset and a backup chipset do not usually synchronize the time of built-in RTC (Real Time Clock). Accordingly, if RTC is not synchronized after the switching of the chipset, system time becomes incorrect. As a result, a variety of problems, such as bad influences for the operation of OS (Operation System) and application, occur. The technology for synchronizing the system time in relation to the present invention will be described below.
For example, a computer disclosed in Japanese Patent Application Laid-Open No. 2002-175129 (hereinafter, patent document 1) does not change the OS time which the operating system manages when the system time is notified to each unit (computer) composing a network. Then, the computer stores the difference value between the system time and the OS time. Then, the computer returns the OS time after adding the difference value to the OS time when an application requests the system time.
And, a multitask system disclosed in Japanese Patent Application Laid-Open No. 2006-349364 (hereinafter, patent document 2) calculates the time difference between the criterion time acquired from an NTP (Network Time Protocol) server of the network and the system time of the built-in timer. Then, the system corrects the system time based on the calculated time difference using a time correction task performed periodically.
And, a computer disclosed in Japanese Patent Application Laid-Open No. 1983-064526 (hereinafter, patent document 3) relates a dual computer system using two computers and synchronizes the time between two computers. Accordingly, the computer writes the time of the timer of the primary computer in an accessible memory periodically from both. Then, when the primary computer has broken down, the computer reads the time from the memory mentioned above and employs it as an initial value at the time.
And, an information processing apparatus disclosed in Japanese Patent Publication No. 1987-046020 (hereinafter, patent document 4) adds the information indicating the time which the self timer function outputs from a information processing apparatus of an active system to the diagnostic information for checking a backup information processing apparatus, and transmits it to the backup information processing apparatus. Then, the backup information processing apparatus of the patent document 4 compares the time added to the received diagnostic information and the time which the self timer function outputs, and corrects so that it may coincidence with the time added to the diagnostic information.